Adaptive FPGA Implementation of VLSI Architecture for Visual Object Detection and Tracking

Yassir Raheem; Vijeta Yadav

Object detection and tracking in computer vision. This research presents an adaptive VLSI architecture designed to efficiently handle the computational demands of video data processing. By utilizing reconfigurable hardware, specifically FPGAs, the proposed system implements a tracking-by-detection framework optimized for parallel processing, significantly enhancing performance compared to traditional serial architectures. Key innovations include a pipelined Fast Fourier Transform (FFT) block and the use of CORDIC algorithms to streamline computations, thereby reducing latency and resource usage. The architecture has been validated on an Altera Cyclone II FPGA, demonstrating effective object tracking in dynamic environments with low power consumption and minimal hardware requirements, making it a scalable solution for real-time applications. computer vision applications.

Select Volume / Issues:

• Volume 16,Issue 4, July 2025

Year:

2025

Type of Publication:

Article

Keywords:

Adaptive FPGA; VLSI; Fast Fourier Transform; CORDIC Algorithms

Journal:

IJECCE

Volume:

16

Number:

4

Pages:

36-50

Month:

July

ISSN:

2249-071X