An Improved Architecture for Multiple-Order Single-Bit Quantizer Based Over-Sampled Delta-Sigma Modulators

Bhaskar Gopalan

A modified alternative switched capacitor discrete-time architecture than that of its regular architecture (a chain of integrators with distributed feedback)for Multiple-Order, Single-bit Quantizer based Over-Sampled Delta-Sigma Modulator (DSM) is proposed. The proposed circuit consists of single-order architecture but includes an added feedback path circuit to establish multiple-order noise-shaping function. This proposed architecture requires only one OP-AMP irrespective of the number of order and provides approximately the same NTF function and slightly better SNR value than that of regular multiple-order architecture. The advantage of having only one OP-AMP is that it allows us to go for high speed and reduced static power dissipation. The cost we are paying for this proposed architecture is that we would need more number of sampling and evaluation pulses than regular architecture and also faces mismatching error but if all the input sampling capacitances in the circuit have equal % variation in the process mismatching then this problem is somewhat alleviated. Theover-sampled delta-sigma modulators for digital audio using the above said switched capacitor, discrete time-domain architecture are designed and developed. The technology used is 130nm, 1.2v, CMOS process. The SPICE simulation shows promising result in SNR for the proposed architecture than that of regular architecture. The attained SNR value using SPICE for the proposed architecture based third order DSM is 91dB whereas for the regular architecture based third order DSM is 83dB for a sine-wave input.

Select Volume / Issues:

• Volume 6,Issue 5, Sept. 2015

Year:

2015

Type of Publication:

Article

Keywords:

Delta-Sigma Modulators; Data Converters; Switched-Capacitor Circuits; Op-Amp; Comparator; SPICE Simulation; SNR

Journal:

IJECCE

Volume:

6

Number:

5

Pages:

614-618

Month:

September