16-Bit RISC Processor Design for Convolution Application

Anand Nandakumar Shardul

In this project, we propose a 16-bit non-pipelined RISC processor, which is used for signal processing applications. The processor consists of the blocks, namely, program counter, clock control unit, ALU, IDU and registers. Advantageous architectural modifications have been made in the incremented circuit used in program counter and carry select adder unit of the ALU in the RISC CPU core. Furthermore, a high speed and low power modified modifies multiplier has been designed and introduced in the design of ALU. The RISC processor has been designed for executing 27-instruction set. It is expandable up to 32 instructions, based on the user requirements.

Select Volume / Issues:

• Volume 4 Issue 6, Nov. 2013

Year:

2013

Type of Publication:

Article

Keywords:

Arithmetic and Logical Unit ALU; Program Counter PC; Register File REG; Instruction Decoder Unit IDU and Clock Control Unit CCU

Journal:

IJECCE

Volume:

4

Number:

6

Pages:

1640-1643

Month:

November