FPGA Implementation of Low Power Multi Serials to Ethernet Gateway for Data Acquisition System

M. Sridivya; T. Pullaiah

Data acquisition is the process of sampling signals that measure real world physical conditions and converting the resulting samples into digital numeric values that can be manipulated by a computer. The communication between them is standard asynchronous serial form by typical serial control card, which have complicated cable wiring, frequently interruption of CPU, which greatly reduces the CPU’s efficiency and impacts the system’s real-time processing. To resolve these problems, a method of multi-serials to Ethernet Gateway based on the field programmable gate array (FPGA) with network interface chip is implemented in this project. The Gateway will send data as Ethernet frame format after receiving serial data, indirectly achieves multi-serials communication, simplifies cabinet wiring and improves CPU’s efficiency. In this project we use WIZ net W5100 Hardwired TCP/IP Embedded Ethernet Controller chip will be interfaced to FPGA to provide Ethernet interface. Various digital signals will be captured by FPGA and will be sent on a serial line. The FPGA implements all the necessary logic to read the data from these sensors and store the data in it. On FPGA logic also will be implemented to read data from multiple numbers of serial ports. The WIZ Net module takes data from serial port and sends to PC in Ethernet form. In PC application will be developed to read data from Ethernet and store it on PC hard disk. The code will be developed in VHDL. Modelsim Xilinx Edition (MXE) will be used for simulation and functional verification. Xilinx tools will be used for synthesizing the core to Spartan-3 FPGA. Chip scope will be used for on chip verification of the results.

Select Volume / Issues:

• Volume 4 Issue 1, Jan. 2013

Year:

2013

Type of Publication:

Article

Keywords:

Ethernet; FPGA; Multiserials; Gateway; UART

Journal:

IJECCE

Volume:

4

Number:

1

Pages:

1-3

Month:

January