Area Efficient Single Phase Clock Divider

R. P. Meenaakshi Sundhari; R. Nandhakumar; C. Jagadeeshwaran

In this paper the prescaler circuit which is used by frequency synthesizers of Bluetooth, zigbee and WLAN is proposed with multi modulus 32/33/47/48 prescaler, ultra low power 2/3 prescaler and integrated P-counter and S-counter. This proposed prescaler can divide the frequency in three bands 0f 2.4-2.484GHz, 5.15-5.35GHz and 5.725-5.825GHz with a resolution selectable from 1-25MHz.The Area and power consumed by the 2/3 prescaler circuit is minimized.

Select Volume / Issues:

• Volume 4 Issue 1, Jan. 2013

Year:

2013

Type of Publication:

Article

Keywords:

DFF; Frequency Synthesizer; U-TSPC; Wireless LAN WLAN; True Single Phase Clock TSPC

Journal:

IJECCE

Volume:

4

Number:

1

Pages:

298-302

Month:

January