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Impact of MOSFET Non Ideal Characteristic Breakdown on Digital Circuit Operation and Reliability

Prof. Jaikaran Singh; Prof. Mukesh Tiwari; Ms. Madhu Singh
In semiconductor perspective reliability is the ability of a device to conform to its electrical and visual/mechanical specifications over a specified period of time under specified conditions at a specified confidence level. Since the beginning reliability has been remained an important part of semiconductor industry. For the last six decades device reliability have improved with each scaled generation of technology. Manufacturers of devices with critical applications like military, automotive and medical mainly contributed to initiate and develop semiconductor reliability field. The reliability of semiconductor products as a function of time is commonly described by a bathtub curve .This is because the plot of the product failure rate as a function of time has the shape of a cross sectioned bathtub as shown in fig. 1. Three failure regimes can be distinguished in the bathtub curve. In the ‘infant mortality’ or ‘early failure’ period, the products show a high, but decreasing failure rate as a function of time until the failure rate stabilizes. This period is referred to as the ‘random failure’ period. Finally, in the ‘wear-out’ period, the failure rate increases again when end-of-life of the products is reached. The nature of the failures in the three periods is generally very different. The majority of the failures in the ‘early failure’ period are caused by manufacturing defects like e.g. particles, near opens and shorts in metal lines, weak spots in isolating dielectrics or poorly bonded bond wires in the package. In the ‘random failure’ period many different root causes occur but failures related to specific events like lightning, load dump spikes occurring during disconnection of car batteries or other overstress situations are most notable. Failures in the ‘wear out’ period are related to intrinsic properties of the materials and devices used in the product in combination with the product use conditions like temperature, voltage and currents including their time dependence. The major long-term reliability concerns include the wear-out mechanisms of time dependent dielectric breakdown (TDDB) of gate dielectrics, hot carrier injection (HCI), negative bias temperature instability (NBTI), electro migration (EM), and stress induced voiding (SIV). Among the wear-out mechanisms, TDDB and NBTI seem to be the major reliability concerns as devices scale. The gate oxide has been scaled down to only a few atomic layers thick with significant tunneling leakage. While the gate leakage current may be at a negligible level compared with the on-state current of a device, it will first have an effect on the overall standby power. For a total active gate area of 0.1 cm2, chip standby power limits the maximum tolerable gate leakage current to approximately 1-10 A/cm2, which occurs for gate oxides in the range of 15-18A.
Select Volume / Issues:
Year:
2012
Type of Publication:
Article
Keywords:
Logic design; Scaling; reliability; MOS devices
Journal:
IJECCE
Volume:
3
Number:
4
Pages:
818-822
Month:
July
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