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Review of High Speed Area Efficient Discrete Cosine Transform Using Various Technique

Pragati Gupta; Sandip Nemade
Low-power design is one of the most important challenges to maximize battery life in portable devices and to save the energy during system operation. Discrete Cosine Transform (DCT) is widely used in image and video compression standards. In this paper, we review on a low-power DCT (Discrete Cosine Transform) architecture using varies techniques. Discrete Cosine Transform (DCT) is one of the most popular lossy techniques used today in video compression schemes. Several algorithms have been proposed to implement the DCT. Loeffler (1989) has given a new class of 1D-DCT using just 11 multiplications and 29 additions. But multiplier consumed more area compared to adder. Multiplier-less implementation approach provides a solution to reduce chip area, lower hardware-complexity and higher speed of computation of the DCT architecture. This paper shows the study of multiplier-less CORDIC technique
Select Volume / Issues:
Year:
2017
Type of Publication:
Article
Keywords:
Discrete Cosine Transform DCT; Inverse Discrete Cosine Transform IDCT; CORDIC
Journal:
IJECCE
Volume:
8
Number:
1
Pages:
84-87
Month:
January
ISSN:
2249-071X
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