Implementation of an AMBA Advanced High Performance Bus protocol IP block

Rishabh Singh Kurmi; Miss. Shruti Bhargava; Mahendra Vucha; Sandeep Magarde

The design of an AMBA advanced high performance bus (AHB) protocol IP block is presented in this paper. The AHB (Advanced High-performance Bus) is a high-performance bus in AMBA (Advanced Microcontroller Bus Architecture) family. This AHB can be used in high clock frequency system modules. The AHB acts as the high-performance system backbone bus. AHB supports the efficient connection of processors, on-chip memories and off-chip external memory interfaces with low-power peripheral macro cell functions. In this work, the design of the Advanced High-Performance Bus Protocol is developed which has the basic blocks such as Master and Slave. The arbitration mechanism is used to ensure that only one master has access to the bus at any one time and the AHB decoder is used to decode the address of each transfer and provide a select signal for the slave that is involved in the transfer. This AMBA-AHB protocol can be adopted in all the application provided the design should be an AHB compliant.

Select Volume / Issues:

• Volume 1 Issue 1, April 2011

Year:

2011

Type of Publication:

Article

Keywords:

AMBA- AHB; System on Chip; IP; On-chip bus; Master side arbitration; Slave side arbitration

Journal:

IJECCE

Volume:

1

Number:

1

Pages:

5 - 9

Month:

April